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By S. Gobriel

ISBN-10: 9535104829

ISBN-13: 9789535104827

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122-125). Ozgun, M. ; Tsividis, Y. & Burra, G. (2006). Dynamic power optimization of active filters with application to zero-IF receivers, IEEE Journal of Solid-State Circuits. Vol. 41, No 6. (June 2006), pp. (1344-1352). ISSN 0018-9200. Park, S. ; Palaskas, Y. P. 18-µm CMOS. IEEE Journal of Solid state circuits, vol. 42, nº2, September 2007, pp. (1865-1872). ; Pandarinathan, R. & Sankar, P. (2008). A Power Optimized Continuous-Time SD ADC for Audio Applications. IEEE Journal of Solid-State Circuits, Vol.

2 Time-Interleaving Time-Interleaving (TI) technique is a method based on the concept of running a system with M parallel channels by taking just one sample alternatively from each one. As a consequence, the ADC as a block would operate at an M times higher frequency than each individual channel. This allows reaching higher operation frequencies at no additional cost of analogue power consumption. However, mismatch between channels (usually the most limiting factors are offset and gain mismatch and clock skew errors) will reduce the resolution of the system.

J. Comer & D. T. , 2001; Tsividis, 2002). Low power consumption can be achieved as the quiescent drain current needed for this level of inversion is quite low. Lower distortion compared to the strong inversion region (D. J. Comer & D. T. Comer, 2004a, 2004b). Higher output resistance of the devices of the input stage due to the low drain currents of transistors operating in weak inversion region. But there are also some disadvantages when designing in weak inversion region. The most important is the reduction in circuit bandwidth and therefore in frequency operation, 26 Energy Efficiency in Communications and Networks although, they can be maximized if some issues are taken into account.

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Energy Efficiency in Communications and Networks by S. Gobriel


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